/**
 * \file
 *
 * \brief SAM4E-EK board init.
 *
 * Copyright (c) 2012-2018 Microchip Technology Inc. and its subsidiaries.
 *
 * \asf_license_start
 *
 * \page License
 *
 * Subject to your compliance with these terms, you may use Microchip
 * software and any derivatives exclusively with Microchip products.
 * It is your responsibility to comply with third party license terms applicable
 * to your use of third party software (including open source software) that
 * may accompany Microchip software.
 *
 * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
 * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
 * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
 * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
 * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
 * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
 * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
 * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
 * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
 * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
 * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
 *
 * \asf_license_stop
 *
 */
/*
 * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
 */

#include "compiler.h"
#include "board.h"
#include "conf_board.h"
#include "ioport.h"
#include "pio.h"
/**
 * \brief Set peripheral mode for IOPORT pins.
 * It will configure port mode and disable pin mode (but enable peripheral).
 * \param port IOPORT port to configure
 * \param masks IOPORT pin masks to configure
 * \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
 */
#define ioport_set_port_peripheral_mode(port, masks, mode) \
	do {\
		ioport_set_port_mode(port, masks, mode);\
		ioport_disable_port(port, masks);\
	} while (0)

/**
 * \brief Set peripheral mode for one single IOPORT pin.
 * It will configure port mode and disable pin mode (but enable peripheral).
 * \param pin IOPORT pin to configure
 * \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
 */
#define ioport_set_pin_peripheral_mode(pin, mode) \
	do {\
		ioport_set_pin_mode(pin, mode);\
		ioport_disable_pin(pin);\
	} while (0)

/**
 * \brief Set input mode for one single IOPORT pin.
 * It will configure port mode and disable pin mode (but enable peripheral).
 * \param pin IOPORT pin to configure
 * \param mode Mode masks to configure for the specified pin (\ref ioport_modes)
 * \param sense Sense for interrupt detection (\ref ioport_sense)
 */
#define ioport_set_pin_input_mode(pin, mode, sense) \
	do {\
		ioport_set_pin_dir(pin, IOPORT_DIR_INPUT);\
		ioport_set_pin_mode(pin, mode);\
		ioport_set_pin_sense_mode(pin, sense);\
	} while (0)

void board_init(void)
{
#ifndef CONF_BOARD_KEEP_WATCHDOG_AT_INIT
	/* Disable the watchdog */
	WDT->WDT_MR = WDT_MR_WDDIS;
#endif

	/* Initialize IOPORTs */
	ioport_init();

	/* Configure the pins connected to LEDs as output and set their
	 * default initial state to high (LEDs off).
	 */
	ioport_set_pin_dir(LED0_GPIO, IOPORT_DIR_OUTPUT);
	ioport_set_pin_level(LED0_GPIO, LED0_INACTIVE_LEVEL);
	
	ioport_set_pin_dir(MUX_CTRL_GPIO, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(MUX_CTRL_GPIO, IOPORT_MODE_PULLUP);
	ioport_set_pin_level(MUX_CTRL_GPIO, MUX_MCU_LEVEL);
	
	ioport_set_pin_dir(MUX_EN_GPIO, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(MUX_EN_GPIO, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(MUX_EN_GPIO, MUX_EN_ACTIVE_LEVEL);
	
	#if __TEST_GPIO
	
			ioport_set_pin_dir(TEST_GPO, IOPORT_DIR_OUTPUT);
			ioport_set_pin_level(TEST_GPO, IOPORT_PIN_LEVEL_HIGH);			
			ioport_set_pin_dir(TEST_GPI, IOPORT_DIR_INPUT);
			ioport_set_pin_mode(TEST_GPI, IOPORT_MODE_PULLUP);
			//ioport_set_pin_input_mode(TEST_GPI, GPIO_PUSH_BUTTON_2_FLAGS,
			//GPIO_PUSH_BUTTON_2_SENSE);
	/*
			ioport_set_pin_dir(TEST_GPO, IOPORT_DIR_INPUT);
			ioport_set_pin_mode(TEST_GPO, IOPORT_MODE_PULLUP);
	*/
	#endif	
	// initialize port of flash control
	// output setting initial
	ioport_set_pin_dir(POR_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(POR_PIN, IOPORT_MODE_PULLUP);
	ioport_set_pin_level(POR_PIN, IOPORT_PIN_LEVEL_LOW);

	ioport_set_pin_dir(OE_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(OE_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(OE_PIN, IOPORT_PIN_LEVEL_LOW);
	
	
	ioport_set_pin_dir(TC_LATCH_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(TC_LATCH_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(TC_LATCH_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(CONFEN_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(CONFEN_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(CONFEN_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(TMEN_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(TMEN_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(TMEN_PIN, IOPORT_PIN_LEVEL_LOW);

	ioport_set_pin_dir(ERASE_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(ERASE_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(ERASE_PIN, IOPORT_PIN_LEVEL_LOW);
			
	ioport_set_pin_dir(ERASE_1_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(ERASE_1_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(ERASE_1_PIN, IOPORT_PIN_LEVEL_LOW);
			
	ioport_set_pin_dir(PROG_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(PROG_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(PROG_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(PROG_1_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(PROG_1_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(PROG_1_PIN, IOPORT_PIN_LEVEL_LOW);	
	
	ioport_set_pin_dir(PROG_2_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(PROG_2_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(PROG_2_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(RDEN_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(RDEN_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(RDEN_PIN, IOPORT_PIN_LEVEL_LOW);

	ioport_set_pin_dir(WE_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(WE_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(WE_PIN, IOPORT_PIN_LEVEL_LOW);
	
	
	ioport_set_pin_dir(PLSE_1_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(PLSE_1_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(PLSE_1_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(PLSE_2_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(PLSE_2_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(PLSE_2_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(CE_1_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(CE_1_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(CE_1_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(CE_2_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(CE_2_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(CE_2_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(CE_3_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(CE_3_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(CE_3_PIN, IOPORT_PIN_LEVEL_LOW);
				
	ioport_set_pin_dir(CE_4_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(CE_4_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(CE_4_PIN, IOPORT_PIN_LEVEL_LOW);
		
	ioport_set_pin_dir(CLOCK_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(CLOCK_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(CLOCK_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(STROB0_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(STROB0_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(STROB0_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(STROB1_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(STROB1_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(STROB1_PIN, IOPORT_PIN_LEVEL_LOW);
		
	ioport_set_pin_dir(IP_CE0_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(IP_CE0_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(IP_CE0_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(IP_CE1_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(IP_CE1_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(IP_CE1_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(IP_CE2_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(IP_CE2_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(IP_CE2_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(IP_CE3_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(IP_CE3_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(IP_CE3_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(IP_CE4_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(IP_CE4_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(IP_CE4_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(IP_CE5_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(IP_CE5_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(IP_CE5_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(IP_CE6_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(IP_CE6_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(IP_CE6_PIN, IOPORT_PIN_LEVEL_LOW);
	
	ioport_set_pin_dir(IP_CE7_PIN, IOPORT_DIR_OUTPUT);
	ioport_set_pin_mode(IP_CE7_PIN, IOPORT_MODE_PULLDOWN);
	ioport_set_pin_level(IP_CE7_PIN, IOPORT_PIN_LEVEL_LOW);
			
	//ioport_set_pin_dir(TEST_GPI, IOPORT_DIR_INPUT);
	//ioport_set_pin_mode(TEST_GPI, IOPORT_MODE_PULLUP);
	///////////////////////////////////
	/*
	ioport_set_pin_dir(LED1_GPIO, IOPORT_DIR_OUTPUT);
	ioport_set_pin_level(LED1_GPIO, LED0_INACTIVE_LEVEL);
	ioport_set_pin_dir(LED2_GPIO, IOPORT_DIR_OUTPUT);
	ioport_set_pin_level(LED2_GPIO, LED0_INACTIVE_LEVEL);
	*/
	/* Configure Push Button pins */
	/*
	ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_1, GPIO_PUSH_BUTTON_1_FLAGS,
			GPIO_PUSH_BUTTON_1_SENSE);
	ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_2, GPIO_PUSH_BUTTON_2_FLAGS,
			GPIO_PUSH_BUTTON_2_SENSE);
	ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_3, GPIO_PUSH_BUTTON_3_FLAGS,
			GPIO_PUSH_BUTTON_3_SENSE);
	ioport_set_pin_input_mode(GPIO_PUSH_BUTTON_4, GPIO_PUSH_BUTTON_4_FLAGS,
			GPIO_PUSH_BUTTON_4_SENSE);
	*/
#ifdef CONF_BOARD_UART_CONSOLE
	/* Configure UART pins */
	ioport_set_port_peripheral_mode(PINS_UART0_PORT, PINS_UART0,
			PINS_UART0_FLAGS);
#endif

#ifdef CONF_BOARD_PWM_LED0
	/* Configure PWM LED0 pin */
	ioport_set_pin_peripheral_mode(PIN_PWM_LED0_GPIO, PIN_PWM_LED0_FLAGS);
#endif

#ifdef CONF_BOARD_PWM_LED1
	/* Configure PWM LED1 pin */
	ioport_set_pin_peripheral_mode(PIN_PWM_LED1_GPIO, PIN_PWM_LED1_FLAGS);
#endif

#ifdef CONF_BOARD_PWM_LED2
	/* Configure PWM LED2 pin */
	ioport_set_pin_peripheral_mode(PIN_PWM_LED2_GPIO, PIN_PWM_LED2_FLAGS);
#endif

#ifdef CONF_BOARD_PWM_LED3
	/* Configure PWM LED3 pin */
	ioport_set_pin_peripheral_mode(PIN_PWM_LED3_GPIO, PIN_PWM_LED3_FLAGS);
#endif

#ifdef CONF_BOARD_USART_RXD
	/* Configure USART RXD pin */
	ioport_set_pin_peripheral_mode(PIN_USART1_RXD_IDX,
			PIN_USART1_RXD_FLAGS);
#endif

#ifdef CONF_BOARD_USART_TXD
	/* Configure USART TXD pin */
	ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX,
			PIN_USART1_TXD_FLAGS);
#endif

#ifdef CONF_BOARD_USART_CTS
	/* Configure USART CTS pin */
	ioport_set_pin_peripheral_mode(PIN_USART1_CTS_IDX,
			PIN_USART1_CTS_FLAGS);
#endif

#ifdef CONF_BOARD_USART_RTS
	/* Configure USART RTS pin */
	ioport_set_pin_peripheral_mode(PIN_USART1_RTS_IDX,
			PIN_USART1_RTS_FLAGS);
#endif

#ifdef CONF_BOARD_USART_SCK
	/* Configure USART synchronous communication SCK pin */
	ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX,
			PIN_USART1_SCK_FLAGS);
#endif

#ifdef CONF_BOARD_ADM3312_EN
	/* Configure ADM3312 enable pin */
	ioport_set_pin_dir(PIN_USART1_EN_IDX, IOPORT_DIR_OUTPUT);
#ifdef CONF_BOARD_ADM3312_EN_DISABLE_AT_INIT
	ioport_set_pin_level(PIN_USART1_EN_IDX, PIN_USART1_EN_INACTIVE_LEVEL);
#else
	ioport_set_pin_level(PIN_USART1_EN_IDX, PIN_USART1_EN_ACTIVE_LEVEL);
#endif
#endif

#ifdef CONF_BOARD_ADS7843
	/* Configure Touchscreen SPI pins */
	ioport_set_pin_dir(BOARD_ADS7843_IRQ_GPIO, IOPORT_DIR_INPUT);
	ioport_set_pin_mode(BOARD_ADS7843_IRQ_GPIO, BOARD_ADS7843_IRQ_FLAGS);
	ioport_set_pin_dir(BOARD_ADS7843_BUSY_GPIO, IOPORT_DIR_INPUT);
	ioport_set_pin_mode(BOARD_ADS7843_BUSY_GPIO, BOARD_ADS7843_BUSY_FLAGS);
	ioport_set_pin_peripheral_mode(SPI_MISO_GPIO, SPI_MISO_FLAGS);
	ioport_set_pin_peripheral_mode(SPI_MOSI_GPIO, SPI_MOSI_FLAGS);
	ioport_set_pin_peripheral_mode(SPI_SPCK_GPIO, SPI_SPCK_FLAGS);
	ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS);
#endif

#ifdef CONF_BOARD_CAN0
	/* Configure the CAN0 TX and RX pins. */
	ioport_set_pin_peripheral_mode(PIN_CAN0_RX_IDX, PIN_CAN0_RX_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_CAN0_TX_IDX, PIN_CAN0_TX_FLAGS);
	/* Configure the transiver0 RS & EN pins. */
	ioport_set_pin_dir(PIN_CAN0_TR_RS_IDX, IOPORT_DIR_OUTPUT);
	ioport_set_pin_dir(PIN_CAN0_TR_EN_IDX, IOPORT_DIR_OUTPUT);
#endif

#ifdef CONF_BOARD_CAN1
	/* Configure the CAN1 TX and RX pin. */
	ioport_set_pin_peripheral_mode(PIN_CAN1_RX_IDX, PIN_CAN1_RX_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_CAN1_TX_IDX, PIN_CAN1_TX_FLAGS);
	/* Configure the transiver1 RS & EN pins. */
	ioport_set_pin_dir(PIN_CAN1_TR_RS_IDX, IOPORT_DIR_OUTPUT);
	ioport_set_pin_dir(PIN_CAN1_TR_EN_IDX, IOPORT_DIR_OUTPUT);
#endif

#if defined(CONF_BOARD_USB_PORT)
#  if defined(CONF_BOARD_USB_VBUS_DETECT)
	pio_configure_pin(USB_VBUS_PIN, USB_VBUS_FLAGS);
#  endif
#endif

#if defined(CONF_BOARD_ILI9325) || defined(CONF_BOARD_ILI93XX)
	/* Configure LCD EBI pins */
	ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D0,PIN_EBI_DATA_BUS_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D1,PIN_EBI_DATA_BUS_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D2,PIN_EBI_DATA_BUS_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D3,PIN_EBI_DATA_BUS_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D4,PIN_EBI_DATA_BUS_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D5,PIN_EBI_DATA_BUS_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D6,PIN_EBI_DATA_BUS_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_DATA_BUS_D7,PIN_EBI_DATA_BUS_FLAGS);

	ioport_set_pin_peripheral_mode(PIN_EBI_NRD,PIN_EBI_NRD_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NWE,PIN_EBI_NWE_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NCS1,PIN_EBI_NCS1_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_LCD_RS,PIN_EBI_LCD_RS_FLAGS);
#endif

#ifdef CONF_BOARD_AAT3155
	/* Configure Backlight control pin */
	ioport_set_pin_dir(BOARD_AAT31XX_SET_GPIO, IOPORT_DIR_OUTPUT);
#endif

#ifdef CONF_BOARD_SPI
	ioport_set_pin_peripheral_mode(SPI_MISO_GPIO, SPI_MISO_FLAGS);
	ioport_set_pin_peripheral_mode(SPI_MOSI_GPIO, SPI_MOSI_FLAGS);
	ioport_set_pin_peripheral_mode(SPI_SPCK_GPIO, SPI_SPCK_FLAGS);

#ifdef CONF_BOARD_SPI_NPCS0
	ioport_set_pin_peripheral_mode(SPI_NPCS0_GPIO, SPI_NPCS0_FLAGS);
#endif

#ifdef CONF_BOARD_SPI_NPCS3
#if defined(CONF_BOARD_SPI_NPCS3_GPIO) && defined(CONF_BOARD_SPI_NPCS3_FLAGS)
	ioport_set_pin_peripheral_mode(CONF_BOARD_SPI_NPCS3_GPIO,
			CONF_BOARD_SPI_NPCS3_FLAGS);
#else
	ioport_set_pin_peripheral_mode(SPI_NPCS3_PA5_GPIO, SPI_NPCS3_PA5_FLAGS);
#endif
#endif
#endif

#if (defined(CONF_BOARD_TWI0) || defined(CONF_BOARD_QTOUCH))
	ioport_set_pin_peripheral_mode(TWI0_DATA_GPIO, TWI0_DATA_FLAGS);
	ioport_set_pin_peripheral_mode(TWI0_CLK_GPIO, TWI0_CLK_FLAGS);
#endif

#if defined (CONF_BOARD_SD_MMC_HSMCI)
	/* Configure HSMCI pins */
	ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCDA_GPIO, PIN_HSMCI_MCCDA_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_HSMCI_MCCK_GPIO, PIN_HSMCI_MCCK_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA0_GPIO, PIN_HSMCI_MCDA0_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA1_GPIO, PIN_HSMCI_MCDA1_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA2_GPIO, PIN_HSMCI_MCDA2_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_HSMCI_MCDA3_GPIO, PIN_HSMCI_MCDA3_FLAGS);

	/* Configure SD/MMC card detect pin */
	ioport_set_pin_dir(SD_MMC_0_CD_GPIO, IOPORT_DIR_INPUT);
	ioport_set_pin_mode(SD_MMC_0_CD_GPIO, SD_MMC_0_CD_FLAGS);
#endif

#ifdef CONF_BOARD_TWI1
	ioport_set_pin_peripheral_mode(TWI1_DATA_GPIO, TWI1_DATA_FLAGS);
	ioport_set_pin_peripheral_mode(TWI1_CLK_GPIO, TWI1_CLK_FLAGS);
#endif

#ifdef CONF_BOARD_KSZ8051MNL
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXC_IDX,
			PIN_KSZ8051MNL_RXC_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXC_IDX,
			PIN_KSZ8051MNL_TXC_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXEN_IDX,
			PIN_KSZ8051MNL_TXEN_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD3_IDX,
			PIN_KSZ8051MNL_TXD3_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD2_IDX,
			PIN_KSZ8051MNL_TXD2_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD1_IDX,
			PIN_KSZ8051MNL_TXD1_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_TXD0_IDX,
			PIN_KSZ8051MNL_TXD0_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD3_IDX,
			PIN_KSZ8051MNL_RXD3_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD2_IDX,
			PIN_KSZ8051MNL_RXD2_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD1_IDX,
			PIN_KSZ8051MNL_RXD1_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXD0_IDX,
			PIN_KSZ8051MNL_RXD0_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXER_IDX,
			PIN_KSZ8051MNL_RXER_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_RXDV_IDX,
			PIN_KSZ8051MNL_RXDV_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_CRS_IDX,
			PIN_KSZ8051MNL_CRS_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_COL_IDX,
			PIN_KSZ8051MNL_COL_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDC_IDX,
			PIN_KSZ8051MNL_MDC_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_KSZ8051MNL_MDIO_IDX,
			PIN_KSZ8051MNL_MDIO_FLAGS);
	ioport_set_pin_dir(PIN_KSZ8051MNL_INTRP_IDX, IOPORT_DIR_INPUT);
#endif

#ifdef CONF_BOARD_TFDU4300_SD
	/* Configure IrDA transceiver shutdown pin */
	ioport_set_pin_dir(PIN_IRDA_SD_IDX, IOPORT_DIR_OUTPUT);
	ioport_set_pin_level(PIN_IRDA_SD_IDX, IOPORT_PIN_LEVEL_HIGH);
#endif

#ifdef CONF_BOARD_ADM3485_RE
	/* Configure RS485 transceiver RE pin */
	ioport_set_pin_dir(PIN_RE_IDX, IOPORT_DIR_OUTPUT);
	ioport_set_pin_level(PIN_RE_IDX, IOPORT_PIN_LEVEL_LOW);
#endif

#ifdef CONF_BOARD_ISO7816_RST
	/* Configure ISO7816 card reset pin */
	ioport_set_pin_dir(PIN_ISO7816_RST_IDX, IOPORT_DIR_OUTPUT);
	ioport_set_pin_level(PIN_ISO7816_RST_IDX, IOPORT_PIN_LEVEL_LOW);
#endif

#ifdef CONF_BOARD_ISO7816
	/* Configure ISO7816 interface TXD & SCK pin */
	ioport_set_pin_peripheral_mode(PIN_USART1_TXD_IDX, PIN_USART1_TXD_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_USART1_SCK_IDX, PIN_USART1_SCK_FLAGS);
#endif

#ifdef CONF_BOARD_NAND
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDOE,   PIN_EBI_NANDOE_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDWE,   PIN_EBI_NANDWE_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDCLE,  PIN_EBI_NANDCLE_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDALE,  PIN_EBI_NANDALE_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_0, PIN_EBI_NANDIO_0_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_1, PIN_EBI_NANDIO_1_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_2, PIN_EBI_NANDIO_2_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_3, PIN_EBI_NANDIO_3_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_4, PIN_EBI_NANDIO_4_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_5, PIN_EBI_NANDIO_5_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_6, PIN_EBI_NANDIO_6_FLAGS);
	ioport_set_pin_peripheral_mode(PIN_EBI_NANDIO_7, PIN_EBI_NANDIO_7_FLAGS);
    ioport_set_pin_dir(PIN_NF_CE_IDX, IOPORT_DIR_OUTPUT);
    ioport_set_pin_dir(PIN_NF_RB_IDX, IOPORT_DIR_INPUT);
	ioport_set_pin_mode(PIN_NF_RB_IDX, IOPORT_MODE_PULLUP);
#endif


#ifdef CONF_BOARD_QTOUCH
	/* Configure CHANGE pin for QTouch device */
	ioport_set_pin_input_mode(BOARD_QT_CHANGE_PIN_IDX, BOARD_QT_CHANGE_PIN_FLAGS,
			BOARD_QT_CHANGE_PIN_SENSE);
#endif
}
